Dieses Logic Analyzer System
besteht aus dem einfachen, alten, aber soliden 8-Bit-Wort Logikanalysator LA-8100-S, der aktiven Probe Driver Einheit
APD-8, und der Anzeigeeinheit, dem Logic Monitor
LM 208-10.Eine vergrößerte Abbildung befindet sich hier.
English translation of German description:
The Dolch LA 8100 S is an old, but reliable Logic Analyzer
The system offered here comes with the Active Probe Driver Unit
the Logic Monitor Unit
The digital logic recorder captures up to 8 parallel digital signals and stores them in memory, and can display them as a timing diagram or with the logic monitor as state tables in binary, hex or octal format.
The latch mode catches random glitches as short as 10 ns which occur between active sample clock transitions.
Clock interval from 0.05 to 200 Ás and 0.05 to 200 ms, selected in 1,2,5 steps.
Trigger modes are: free run (enforced triggering), external or 10-bit combined word.
Pre-trigger data selection in three delay ranges: 1/8, 1/2, and 7/8 of channel capacity.
Combinational true/false triggering is provided as well.Please find an enlarged image here.